Hiroki Matsutani 研究室

主宰者：Hiroki Matsutani

慶應義塾大学

AI 要約（直近 5 年の研究成果）

要約はまだ生成されていません。

※ AI（Claude）が、公開されている論文要旨から研究の問い・手法・主要な発見を事実情報として抽出・再構成して自動生成しています。誤りを含む可能性があるため、正確性は研究室公式情報でご確認ください。

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研究成果（42 件）

[2026] Accelerating Local LLMs on Resource-Constrained Edge Devices via Distributed Prompt Caching
DOI: https://doi.org/10.1145/3805621.3807647
[2025] Performance and Power-Efficiency Improvements on Graph Embedding using Sequential Training Algorithm and FPGA
DOI: https://doi.org/10.1587/transinf.2024edp7319
[2025] PointODE: Lightweight Point Cloud Learning with Neural Ordinary Differential Equations on Edge
DOI: https://doi.org/10.1109/icfpt67023.2025.00023
[2025] FPGA-accelerated Correspondence-free Point Cloud Registration with PointNet Features
DOI: https://doi.org/10.1145/3717836
[2025] Skip2-LoRA: A Lightweight On-device DNN Fine-tuning Method for Low-cost Edge Devices
DOI: https://doi.org/10.1145/3658617.3697589
[2024] A Feasibility Study of Data Poisoning against On-device Learning Edge AI by Physical Attack against Sensors
DOI: https://doi.org/10.2299/jsp.28.107
[2024] Federated Learning of Neural ODE Models with Different Iteration Counts
DOI: https://doi.org/10.1587/transinf.2023edp7176
[2024] A Sequential Approach to Detect Drifts and Retrain Neural Networks on Resource-Limited Edge Devices
DOI: https://doi.org/10.1587/transinf.2023edp7123
[2024] An Integrated FPGA Accelerator for Deep Learning-Based 2D/3D Path Planning
DOI: https://doi.org/10.1109/tc.2024.3377895
[2024] An Efficient Distributed Reinforcement Learning Architecture for Long-Haul Communication Between Actors and Learner
DOI: https://doi.org/10.1109/access.2024.3402835

続きを表示（残り 32 件）

[2024] A Cost-Efficient FPGA-Based CNN-Transformer Using Neural ODE
DOI: https://doi.org/10.1109/access.2024.3480977
[2024] The Case for Coherence Directories in Memory Cubes
DOI: https://doi.org/10.1109/mcsoc64144.2024.00040
[2024] A Tiny Supervised ODL Core with Auto Data Pruning for Human Activity Recognition
DOI: https://doi.org/10.1109/bsn63547.2024.10780692
[2024] An FPGA-Based Accelerator for Graph Embedding using Sequential Training Algorithm
DOI: https://doi.org/10.1109/ipdpsw63119.2024.00040
[2024] Data Poisoning Attack against Neural Network-Based On-Device Learning Anomaly Detector by Physical Attacks on Sensors
DOI: https://doi.org/10.3390/s24196416
[2023] Performance Improvement of Federated Learning Server using Smart NIC
DOI: https://doi.org/10.1109/candarw60564.2023.00035
[2023] Addressing the Gap Between Training Data and Deployed Environment by On-Device Learning
DOI: https://doi.org/10.1109/mm.2023.3314711
[2023] A Lightweight Reinforcement Learning Based Packet Routing Method Using Online Sequential Learning
DOI: https://doi.org/10.1587/transinf.2022edp7231
[2023] A Low-Cost Neural ODE with Depthwise Separable Convolution for Edge Domain Adaptation on FPGAs
DOI: https://doi.org/10.1587/transinf.2022edp7149
[2023] A Lightweight Concept Drift Detection Method for On-Device Learning on Resource-Limited Edge Devices
DOI: https://doi.org/10.1109/ipdpsw59300.2023.00128
[2023] A Lightweight Transformer Model using Neural ODE for FPGAs
DOI: https://doi.org/10.1109/ipdpsw59300.2023.00029
[2023] An Edge-Server Partitioning Method for 3D LiDAR SLAM on FPGAs
DOI: https://doi.org/10.1109/ipdpsw59300.2023.00030
[2023] An Efficient Accelerator for Deep Learning-based Point Cloud Registration on FPGAs
DOI: https://doi.org/10.1109/pdp59025.2023.00018
[2022] P3Net: PointNet-based Path Planning on FPGA
DOI: https://doi.org/10.1109/icfpt56656.2022.9974251
[2022] A Packet Routing using Lightweight Reinforcement Learning Based on Online Sequential Learning
DOI: https://doi.org/10.1109/candarw57323.2022.00081
[2022] Communication Size Reduction of Federated Learning based on Neural ODE Model
DOI: https://doi.org/10.1109/candarw57323.2022.00084
[2022] Dynamic Routing Reconfiguration for Low-Latency and Deadlock-Free Interconnection Networks
DOI: https://doi.org/10.1109/candar57322.2022.00023
[2022] dsODENet: Neural ODE and Depthwise Separable Convolution for Domain Adaptation on FPGAs
DOI: https://doi.org/10.1109/pdp55904.2022.00031
[2022] A traffic-aware memory-cube network using bypassing
DOI: https://doi.org/10.1016/j.micpro.2022.104471
[2022] A Universal LiDAR SLAM Accelerator System on Low-Cost FPGA
DOI: https://doi.org/10.1109/access.2022.3157822
[2021] An FPGA-Based Optimizer Design for Distributed Deep Learning with Multiple GPUs
DOI: https://doi.org/10.1587/transinf.2021pap0008
[2021] A unified accelerator design for LiDAR SLAM algorithms for low-end FPGAs
DOI: https://doi.org/10.1109/icfpt52863.2021.9609886
[2021] A Domain Adaptation Method using Light-Weight Neural ODE for Low-Cost FPGAs
[2021] GPU Parallelization of All-Pairs-Shortest-Path Algorithm in Low-Degree Unweighted Regular Graph
DOI: https://doi.org/10.1145/3468081.3471122
[2021] An FPGA-Based On-Device Reinforcement Learning Approach using Online Sequential Learning
DOI: https://doi.org/10.1109/ipdpsw52791.2021.00022
[2021] An FPGA Acceleration and Optimization Techniques for 2D LiDAR SLAM Algorithm
DOI: https://doi.org/10.1587/transinf.2020edp7174
[2021] A Neural ODE Based Domain Adaptation Method for Edge Devices
[2021] An Overflow/Underflow-Free Fixed-Point Bit-Width Optimization Method for OS-ELM Digital Circuit
DOI: https://doi.org/10.1587/transfun.2021vlp0017
[2021] Low-Latency Low-Energy Memory-Cube Networks using Dual-Voltage Datapaths
DOI: https://doi.org/10.1109/pdp52278.2021.00030
[2021] Evaluations of FPGA-based Neural Networks using of ODE
[2021] An On-Device Federated Learning Approach for Cooperative Model Update Between Edge Devices
DOI: https://doi.org/10.1109/access.2021.3093382
[2021] An In-Network Parameter Aggregation using DPDK for Multi-GPU Deep Learning
DOI: https://doi.org/10.15803/ijnc.11.2_516

科研費（0 件）

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所属学会・役職（0 件）

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AI 要約（直近 5 年の研究成果）

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関連研究室(8 件)

研究成果（42 件）

科研費（0 件）

所属学会・役職（0 件）